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Stepwise pad driver in deep-submicron technology

This project concerns a low-power pad driver design invented by the supervisor approximately 15 years ago [1]. Using stepwise charging [2], the driver consumed considerably less power than the fCV2 which is usually considered the lower limit for rail-to-rail swing.

The driver was implemented in a 0.8um CMOS process and reached decent performance for the time with a transition time of about 10ns. With present semiconductor processes, we should be able to do quite a bit better while still dissipating less than fCV2. With these higher switching speeds, it will however be necessary to consider the package effects (bond-wire inductances and the like). Therein lies the novel aspects of this project.

Successful completion of the project requires good CMOS layout and circuit simulation skills (i.e. Spice/Spectre). Good results may be publishable.


Lars Svensson

Tentative and rough time plan

Week 1-3
Literature study, CAD tool setup, Development of detailed time plan
Week 4-9
Schematic-level design, Simulation, Verification of dissipation properties
Week 10-16
Layout and verification vs. schematic
Week 17-20
Buffer time, report writing


[1] L.J. Svensson, W.C. Athas, and R.S-C.Wen. A sub-CV2 pad driver with 10 ns transition time. In Proc. of the International Symposium on Low-Power Electronics and Design, Monterey, CA, Aug 1214, 1996.

[2] L.J. Svensson and J.G. Koller. Driving a capacitive load without dissipating fCV2. 1994 Symposium on Low Power Electronics, Oct. 1994.